SIMULATION OF C-OTA FOR LOW POWER APPLICATIONS

Abstract

The evolution of the microelectronics industry is distinguished by the raising level of integration and complexity. It aims to decrease exponentially the minimum feature sizes used to design integrated circuits. The cost of design is a great problem to the continuation of this evolution. Senior designer’s knowledge and skills are required to ensure a good design of analogue integrated circuit. To fulfil the above mentioned requirements, the designer must choose the suitable circuit architecture. This paper presents an optimized methodology to cascode operational transconductance amplifier (C-OTA) design. The challenge in the design of op- amps is the scaling down of the supply voltage and transistor channel length with each generation of CMOS technologies. As CMOS technology continues to evolve, the supply voltages are decreasing while at the same time, the transistor threshold voltages are remaining relatively constant. The decrease in the inherent gain of the nano-CMOS transistors is also of great concern. The design is done for different parameters like gain, bandwidth, phase margin and slew rate etc to optimize MOS transistor sizing. The designed cascode OTA achieves a DC gain of satisfied range and an optimum unity-gain frequency. Keywords: CMOS IC design, Cascode OTA design methodology, optimization.