An Implementation 8×8 circuit of the 6T SRAM Bit cell by using Memory Array

Authors

  • Chanchal Rana Dr. Jai Gopal Pandey Department of Electronics and Communication, Jayoti Vidyapeeth Women’s University, Jaipur Rajasthan IC Design Group CSIR-CEERI, Pilani, Rajasthan

Abstract

Static Random access memory (SRAM) is useful building blocks area in many applications such as a data storage embedded applications, cache memories, microprocessors. Large SRAM arrays that are widely used as cache memory in microprocessors and application specific integrated circuits can occupy a significant portion of the die area. A Memory Array aggregates Flash memory components using a hot swappable form factor, and placing many of these modules into an array. The quest for larger data storage capacity lead the fabrication technology and memory development process to drive them to a more compact design rules. Keyword: S-RAM, Circuit, Memory, Array, Bit, Cell, Line.

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Published

2015-08-30

How to Cite

Dr. Jai Gopal Pandey, C. R. (2015). An Implementation 8×8 circuit of the 6T SRAM Bit cell by using Memory Array. International Journal of Engineering Technology and Computer Research, 3(4). Retrieved from https://ijetcr.org/index.php/ijetcr/article/view/220

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Articles