Comparative study of Built in Self Test for memory

Abstract

The VLSI manufacturing technology advances has made possible to put millions of transistors on a single die. This advancement in IC technology enabled the integration of all the components of a system into a single chip. With the trend of SOC technology, high density and high capacity embedded memories are required for successful implementation of the system. Depending upon the application and design, much of the low yield can be attributed to faults in the memory. In this paper we study the BIST (Built in self test) for memory testing and compare the algorithms for testing.
Key Words: VLSI, IC, SOC, BIST